top of page

Differential Amplifier with Current Mirror Bias 

The goal of this project was to design an amplifier with a current mirror bias with a gain of over 30 V/V.


For our single-ended amplifier, we used transistors from tsmcN65 kit. 2 PMOS transistors on top with a (W3, 4 / L3, 4) of (10µ / 500n) and 2 NMOS transistors on the bottom with a (W1, 2 / L1, 2) of (11µ / 200n). When we calculated the gain, we got Av = 30.42 V/V > 30 V/V from the spec. Our supply voltage Vdd = 1.2 V. All of our transistors are in the saturation region (region = 2) and Vdsat ≥ 50 mV.

For our current mirror, we used a single-staged current mirror. We had two transistors in NMOS with a (W5 / L5) = (700n / 200n) and (W6 / L6) = (2µ / 200n). We were to create a current mirror to mimic the tail current that we used for our amplifier of 250µ A.

Screenshot 2023-12-31 at 6.34.45 PM.png

Figure 1 Single Stage Amplifier

Screenshot 2023-12-31 at 6.36.29 PM.png

Figure 2 Single Stage Current Mirror with Amplifier

Procedure and Analysis

  1. When building our op-amp, we opted to build a single stage differential amplifier.The purpose of this device is to amplify the input signal without introducing significant distortion or noise. The main focus of the amplifier was to ensure a mid-band gain of at least 30 V/V. Using the formula Av= (Rout,M4// Rout,M2)*gm,M2, we realized we had to maximize Rout while ensuring gm is not compromised. Additionally, we were careful to not reduce the vdsoutput too low to ensure the devices stay in saturation. We then adjusted our (W/L) ratios for both PMOS and NMOS transistors to increase id, thereby increasing gm = 2id/(Vgs-VTH) . Eventually, we determined our optimal values as (W/L)P= 10um/500nm and (W/L)N= 16um/200nm, tail current of 250 mV, and a Vin of 500 mV. As provided in the table above, this gave us a mid-band gain of 30.42 V/V. 

  2. Moving onto the next part of our build, we first created the symbol of our amplifier with 5 pins: VIp, Vin, Vout, Vdd, and Itail. When creating our voltage mirror, we originally attempted to build a two-stage cascode current mirror (Fig 2) as this was optimal for using up the least amount of voltage, providing us with a solid amount of headroom. However, we believe due to the sensitivity of getting all 4 transistors’ (W/L) ratios perfectly balanced, we were not able to get all 4 in saturation. As a result, we ended up switching to a single-cascode current mirror to mitigate the numer of parameters we had to handle and properly produce the tail current. 

  3. In this basic current mirror, we used 2 nmos devices and connected a Vdd and Irefto the transistor in the mirror. By using the equation, IOUT= ((W/L)2/(W/L)1)* IREF, we were able to determine that the ratio between the two transistors is supposed to be 2. As a result, we were able to determine the (W/L)M4= 2um/200nm and (W/L)M2=700 nM/ 200nM. With these values, we were able to push both of the transistors into saturation. We then ran a DC response from the drain of transistor M4 to check and ensure that the mirrored current was the same as the initial tail current value of 250 mA which can be clearly seen in Fig 4. 

  4. Lastly, once the entire circuit was put together, we came across the closed loop gain. From Figure 6, we can see that the gain of this circuit was not at the desired value of 4, moreover it was closer to a gain of 1V/V. We believe this error occurred because the current mirror pushed the transistors of the amplifier out of saturation which would have killed the gain. We tried placing the current mirror into our original amplifier without pins, but we were unable to drive them all into saturation while preserving the mid-band gain of 30 V/V. 

  5. Overall, although we were not able to get our gain high enough to reach our expectations, we were still able to apply all of the concepts we learned in class into a realistic situation. Building this project definitely improved our understanding of analog as a whole, and we hope to continue to iterate on these skills in the future. 

bottom of page